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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Freescale Semiconductor, Inc.
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The RF MOSFET Line
RF Power Field Effect Transistors
Designed for broadband commercial and industrial applications with frequencies to 175 MHz. The high gain and broadband performance of these devices make them ideal for large-signal, common source amplifier applications in 12.5 volt mobile FM equipment. * Specified Performance @ 175 MHz, 12.5 Volts Output Power -- 50 Watts Power Gain -- 12 dB Efficiency -- 50% * Capable of Handling 20:1 VSWR, @ 15.6 Vdc, 175 MHz, 2 dB Overdrive * Excellent Thermal Stability * Characterized with Series Equivalent Large-Signal Impedance Parameters * Broadband-Full Power Across the Band: 135-175 MHz * Broadband Demonstration Amplifier Information Available Upon Request * In Tape and Reel. T1 Suffix = 500 Units per 44 mm, 13 inch Reel.
N-Channel Enhancement-Mode Lateral MOSFETs
MRF1550T1 MRF1550FT1
175 MHz, 50 W, 12.5 V LATERAL N-CHANNEL BROADBAND RF POWER MOSFETs
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CASE 1264-09, STYLE 1 TO-272 PLASTIC MRF1550T1
CASE 1264A-02, STYLE 1 TO-272 STRAIGHT LEAD PLASTIC MRF1550FT1
MAXIMUM RATINGS
Rating Drain-Source Voltage Gate-Source Voltage Drain Current -- Continuous Total Device Dissipation @ TC = 25C (1) Derate above 25C Storage Temperature Range Operating Junction Temperature Symbol VDSS VGS ID PD Tstg TJ Value 40 20 12 165 0.50 -65 to +150 175 Unit Vdc Vdc Adc Watts W/C C C
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance, Junction to Case (1) Calculated based on the formula PD = TJ - TC RJC Symbol RJC Max 0.75 Unit C/W
NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed.
REV 6
MOTOROLA RF Motorola, Inc. 2003 DEVICE DATA
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MRF1550T1 MRF1550FT1 1
Freescale Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS -- continued (TC = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) Gate-Source Leakage Current (VGS = 10 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = 12.5 Vdc, ID = 800 A) Drain-Source On-Voltage (VGS = 5 Vdc, ID = 1.2 A) Drain-Source On-Voltage (VGS = 10 Vdc, ID = 4.0 Adc) DYNAMIC CHARACTERISTICS VGS(th) RDS(on) VDS(on) 1 -- -- -- -- -- 3 0.5 1 Vdc Vdc IDSS IGSS -- -- -- -- 1 0.5 Adc Adc Symbol Min Typ Max Unit
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Input Capacitance (Includes Input Matching Capacitance) (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Output Capacitance (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Reverse Transfer Capacitance (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) RF CHARACTERISTICS (In Motorola Test Fixture) Common-Source Amplifier Power Gain (VDD = 12.5 Vdc, Pout = 50 Watts, IDQ = 500 mA) Drain Efficiency (VDD = 12.5 Vdc, Pout = 50 Watts, IDQ = 500 mA) f = 175 MHz f = 175 MHz
Ciss Coss Crss
-- -- --
-- -- --
500 250 35
pF pF pF
Gps
dB 10 50 -- -- -- % -- No Degradation in Output Power Before and After Test
Load Mismatch (VDD = 15.6 Vdc, f = 175 MHz, 2 dB Input Overdrive, VSWR 20:1 at All Phase Angles)
MRF1550T1 MRF1550FT1 2
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MOTOROLA RF DEVICE DATA
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VGG C10 C9 C8 + R4 R3 C21 L5 R2 N1 C1 Z1 C2 L1 C3 Z2 C4 Z3 C5 L2 C7 R1 RF INPUT Z4 C6 Z5 DUT C11 C12 C13 C14 C15 C16 Z6 Z7 Z8 L3 Z9 L4 Z10 Z11 C17 N2 RF OUTPUT C20 C19 C18 + VDD
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B1 C1 C2 C3 C4, C16 C5 C6 C7, C17 C8, C18 C9, C19 C10 C11, C12 C13 C14 C15 C20 L1 L2 L3
Ferroxcube #VK200 180 pF, 100 mil Chip Capacitor 10 pF, 100 mil Chip Capacitor 33 pF, 100 mil Chip Capacitor 24 pF, 100 mil Chip Capacitors 160 pF, 100 mil Chip Capacitor 240 pF, 100 mil Chip Capacitor 300 pF, 100 mil Chip Capacitors 10 F, 50 V Electrolytic Capacitors 0.1 F, 100 mil Chip Capacitors 470 pF, 100 mil Chip Capacitor 200 pF, 100 mil Chip Capacitors 22 pF, 100 mil Chip Capacitor 30 pF, 100 mil Chip Capacitor 6.8 pF, 100 mil Chip Capacitor 1,000 pF, 100 mil Chip Capacitor 18.5 nH, Coilcraft #A05T 5 nH, Coilcraft #A02T 1 Turn, #24 AWG, 0.250 ID
L4 L5 N1, N2 R1 R2 R3 R4 Z1 Z2 Z3 Z4 Z5, Z6 Z7 Z8 Z9 Z10 Z11 Board
1 Turn, #26 AWG, 0.240 ID 3 Turn, #24 AWG, 0.180 ID Type N Flange Mounts 5.1 , 1/4 W Chip Resistor 39 Chip Resistor (0805) 1 k, 1/8 W Chip Resistor 33 k, 1/4 W Chip Resistor 1.000 x 0.080 Microstrip 0.400 x 0.080 Microstrip 0.200 x 0.080 Microstrip 0.200 x 0.080 Microstrip 0.100 x 0.223 Microstrip 0.160 x 0.080 Microstrip 0.260 x 0.080 Microstrip 0.280 x 0.080 Microstrip 0.270 x 0.080 Microstrip 0.730 x 0.080 Microstrip Glass Teflon, 31 mils
Figure 1. 135 - 175 MHz Broadband Test Circuit
TYPICAL CHARACTERISTICS
80 Pout , OUTPUT POWER (WATTS) 70 60 50 40 30 20 10 0 0 1.0 VDD = 12.5 Vdc 3.0 2.0 4.0 Pin, INPUT POWER (WATTS) 5.0 6.0 175 MHz 155 MHz 0 135 MHz IRL, INPUT RETURN LOSS (dB) -5 175 MHz 135 MHz -15 155 MHz -20 10 20 30 40 50 60 Pout, OUTPUT POWER (WATTS) 70 80 VDD = 12.5 Vdc
-10
Figure 2. Output Power versus Input Power
Figure 3. Input Return Loss versus Output Power
MOTOROLA RF DEVICE DATA
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TYPICAL CHARACTERISTICS
16 175 MHz 15 14 GAIN (dB) 155 MHz 13 12 11 10 10 20 40 50 60 30 Pout, OUTPUT POWER (WATTS) h, DRAIN EFFICIENCY (%) 70 60 50 40 VDD = 12.5 Vdc 80 30 10 20 40 50 60 30 Pout, OUTPUT POWER (WATTS) 70 80 135 MHz 155 MHz 175 MHz 80
135 MHz
VDD = 12.5 Vdc 70
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Figure 4. Gain versus Output Power
Figure 5. Drain Efficiency versus Output Power
70 Pout , OUTPUT POWER (WATTS) 135 MHz
80 155 MHz h, DRAIN EFFICIENCY (%) 70 175 MHz 135 MHz 60
65
175 MHz 60 155 MHz 55 VDD = 12.5 Vdc Pin = 35 dBm 400 600 800 IDQ, BIASING CURRENT (mA) 1000 1200
50
VDD = 12.5 Vdc Pin = 35 dBm 400 600 800 IDQ, BIASING CURRENT (mA) 1000 1200
50 200
40 200
Figure 6. Output Power versus Biasing Current
Figure 7. Drain Efficiency versus Biasing Current
80 155 MHz h, DRAIN EFFICIENCY (%) 70 175 MHz
90 Pout , OUTPUT POWER (WATTS) 80 70 60 50 40 30 10 11 12 13 135 MHz 175 MHz IDQ = 500 mA Pin = 35 dBm 14 15 155 MHz
60
135 MHz
50
IDQ = 500 mA Pin = 35 dBm 11 12 13 14 15
40 10
VDD, SUPPLY VOLTAGE (VOLTS)
VDD, SUPPLY VOLTAGE (VOLTS)
Figure 8. Output Power versus Supply Voltage
Figure 9. Drain Efficiency versus Supply Voltage
MRF1550T1 MRF1550FT1 4
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MOTOROLA RF DEVICE DATA
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Zo = 10
f = 175 MHz f = 175 MHz ZOL* Zin f = 135 MHz f = 135 MHz
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VDD = 12.5 V, IDQ = 500 mA, Pout = 50 W f MHz 135 155 175 Zin Zin 4.1 + j0.5 4.2 + j1.7 3.7 + j2.3 ZOL* 1.0 + j0.6 1.2 + j.09 0.7 + j1.1
= Complex conjugate of source impedance.
ZOL* = Complex conjugate of the load impedance at given output power, voltage, frequency, and D > 50 %.
Input Matching Network
Device Under Test
Output Matching Network
Z
in
Z
* OL
Figure 10. Series Equivalent Input and Output Impedance
MOTOROLA RF DEVICE DATA
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Table 1. Common Source Scattering Parameters (VDD = 12.5 Vdc) IDQ = 500 mA
f MHz 50 100 150 200 250 300 350 400 450 S11 |S11| 0.93 0.94 0.95 0.95 0.96 0.97 0.97 0.98 0.98 0.98 0.99 0.98 -178 -178 -178 -178 -178 -178 -178 -178 -178 -178 -177 -178 |S21| 4.817 2.212 1.349 0.892 0.648 0.481 0.370 0.304 0.245 0.209 0.178 0.149 S21 80 69 61 54 51 47 46 43 43 43 41 41 |S12| 0.009 0.009 0.008 0.006 0.005 0.004 0.005 0.001 0.005 0.003 0.007 0.010 S12 -39 -3 -8 -13 -7 -8 4 15 81 84 70 106 |S22| 0.86 0.88 0.90 0.92 0.93 0.95 0.95 0.97 0.97 0.97 0.98 0.96 S22 -176 -175 -174 -174 -174 -174 -174 -174 -174 -174 -175 -175
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500 550 600
IDQ = 2.0 mA
f MHz 50 100 150 200 250 300 350 400 450 500 550 600 S11 |S11| 0.93 0.94 0.95 0.95 0.96 0.97 0.97 0.98 0.98 0.98 0.99 0.98 -177 -178 -178 -178 -178 -178 -178 -178 -178 -177 -177 -178 |S21| 4.81 2.20 1.35 0.89 0.65 0.48 0.37 0.30 0.25 0.21 0.18 0.15 S21 80 69 61 54 51 47 46 43 43 44 41 41 |S12| 0.003 0.006 0.003 0.004 0.001 0.004 0.006 0.007 0.006 0.006 0.002 0.004 S12 -119 4 -1 18 28 77 85 53 74 84 106 116 |S22| 0.93 0.93 0.93 0.93 0.94 0.94 0.95 0.96 0.97 0.97 0.97 0.96 S22 -178 -178 -177 -176 -176 -175 -175 -174 -174 -174 -175 -174
IDQ = 4.0 mA
f MHz 50 100 150 200 250 300 350 S11 |S11| 0.97 0.96 0.96 0.96 0.97 0.97 0.97 -179 -179 -179 -179 -179 -179 -179 |S21| 5.04 2.43 1.60 1.14 0.89 0.71 0.57 S21 87 82 77 74 71 68 67 |S12| 0.002 0.006 0.004 0.003 0.004 0.006 0.006 S12 -116 42 13 43 65 68 74 |S22| 0.94 0.94 0.94 0.95 0.95 0.95 0.97 S22 -179 -178 -177 -176 -175 -175 -174
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MOTOROLA RF DEVICE DATA
Freescale Semiconductor, Inc.
Table 1. Common Source Scattering Parameters (VDD = 12.5 Vdc) (continued) IDQ = 4.0 mA (continued)
f MHz 400 450 500 550 600 S11 |S11| 0.97 0.98 0.98 0.98 0.98 -179 -178 -178 -178 -178 |S21| 0.49 0.41 0.36 0.32 0.27 S21 63 63 62 58 58 |S12| 0.005 0.005 0.003 0.004 0.009 S12 58 73 128 57 83 |S22| 0.97 0.98 0.98 0.99 0.98 S22 -173 -173 -173 -174 -174
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MOTOROLA RF DEVICE DATA
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APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS This device is a common-source, RF power, N-Channel enhancement mode, Lateral Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET). Motorola Application Note AN211A, "FETs in Theory and Practice", is suggested reading for those not familiar with the construction and characteristics of FETs. This surface mount packaged device was designed primarily for VHF and UHF mobile power amplifier applications. Manufacturability is improved by utilizing the tape and reel capability for fully automated pick and placement of parts. However, care should be taken in the design process to insure proper heat sinking of the device. The major advantages of Lateral RF power MOSFETs include high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate-to-drain (Cgd), and gate-to-source (Cgs). The PN junction formed during fabrication of the RF MOSFET results in a junction capacitance from drain-to-source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the inter-terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF applications. drain-source voltage under these conditions is termed VDS(on). For MOSFETs, VDS(on) has a positive temperature coefficient at high temperatures because it contributes to the power dissipation within the device. BVDSS values for this device are higher than normally required for typical applications. Measurement of BVDSS is not recommended and may result in possible damage to the device. GATE CHARACTERISTICS The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The DC input resistance is very high - on the order of 109 -- resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage to the gate greater than the gate-to-source threshold voltage, VGS(th). Gate Voltage Rating -- Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination -- The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the devices due to voltage build-up on the input capacitor due to leakage currents or pickup. Gate Protection -- These devices do not have an internal monolithic zener diode from gate-to-source. If gate protection is required, an external zener diode is recommended. Using a resistor to keep the gate-to-source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate-drain capacitance. If the gate-to-source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate-threshold voltage and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent drain current (IDQ), whose value is application dependent. This device was characterized at IDQ = 150 mA, which is the suggested value of bias current for typical applications. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL Power output of this device may be controlled to some degree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. This characteristic is very dependent on frequency and load line.
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Drain Cgd Gate Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd
Cds Cgs Source
DRAIN CHARACTERISTICS One critical figure of merit for a FET is its static resistance in the full-on condition. This on-resistance, RDS(on), occurs in the linear region of the output characteristic and is specified at a specific gate-source voltage and drain current. The
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MOTOROLA RF DEVICE DATA
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MOUNTING The specified maximum thermal resistance of 0.75C/W assumes a majority of the 0.170 x 0.608 source contact on the back side of the package is in good contact with an appropriate heat sink. As with all RF power devices, the goal of the thermal design should be to minimize the temperature at the back side of the package. Refer to Motorola Application Note AN4005/D, "Thermal Management and Mounting Method for the PLD-1.5 RF Power Surface Mount Package," and Engineering Bulletin EB209/D, "Mounting Method for RF Power Leadless Surface Mount Transistor" for additional information. AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for this device. For examples see Motorola Application Note AN721, "Impedance Matching Networks Applied to RF Power Transistors." Large-signal impedances are provided, and will yield a good first pass approximation. Since RF power MOSFETs are triode devices, they are not unilateral. This coupled with the very high gain of this device yields a device capable of self oscillation. Stability may be achieved by techniques such as drain loading, input shunt resistive loading, or output to input feedback. The RF test fixture implements a parallel resistor and capacitor in series with the gate, and has a load line selected for a higher efficiency, lower gain, and more stable operating region. Two-port stability analysis with this device's S-parameters provides a useful tool for selection of loading or feedback circuitry to assure stable operation. See Motorola Application Note AN215A, "RF Small-Signal Design Using Two-Port Parameters" for a discussion of two port network theory and stability.
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MOTOROLA RF DEVICE DATA
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PACKAGE DIMENSIONS
B r1
E1
A
DRAIN ID NOTE 6
4X
b2 aaa
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DRAIN ID
6
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aaa
2
D
4X
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6
4X
3
4
b3
E
C
SEATING PLANE
A
DATUM PLANE
H Y
E2 Y D
SEATING PLANE
NOTES: 1. CONTROLLING DIMENSION: INCH . 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE -H- IS LOCATED AT TOP OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE TOP OF THE PARTING LINE. 4. DIMENSION D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.006 PER SIDE. DIMENSION D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 5. DIMENSIONS b1 AND b3 DO NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.005 TOTAL IN EXCESS OF THE b1 AND b2 DIMENSIONS AT MAXIMUM MATERIAL CONDITION. 6. CROSSHATCHING REPRESENTS THE EXPOSED AREA OF THE HEAT SLUG. DIM A A1 A2 D D1 E E1 E2 L b1 b2 b3 c1 e r1 q aaa INCHES MIN MAX 0.098 0.108 0.000 0.004 0.100 0.104 0.928 0.932 0.806 0.814 0.296 0.304 0.248 0.252 0.241 0.245 0.060 0.070 0.193 0.199 0.078 0.084 0.088 0.094 0.007 0.011 0.193 BSC 0.063 0.068 0_ 6_ 0.004 MILLIMETERS MIN MAX 2.49 2.74 0.00 0.10 2.54 2.64 23.57 23.67 20.47 20.68 7.52 7.72 6.30 6.40 6.12 6.22 1.52 1.78 4.90 5.05 1.98 2.13 2.24 2.39 0.18 0.28 4.90 BSC 1.60 1.73 0_ 6_ 0.10
L q
A1
A2
c1
STYLE 1: PIN 1. 2. 3. 4. 5. 6.
SOURCE (COMMON) DRAIN SOURCE (COMMON) SOURCE (COMMON) GATE SOURCE (COMMON)
CASE 1264-09 ISSUE J TO-272 PLASTIC MRF1550T1
MRF1550T1 MRF1550FT1 10
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E2 VIEW Y-Y
3
2
1
MOTOROLA RF DEVICE DATA
Freescale Semiconductor, Inc.
B E1 A E2
2X
P DAB
aaa
M
DRAIN ID NOTE 5
4X
b2 aaa
M
DA
4
1
DRAIN ID
6
2X
b1
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5
2
D
4X
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Freescale Semiconductor, Inc...
e
6
4X
3
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D1 aaa
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c1 A D
SEATING PLANE
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ZONE "J"
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A1 6 A2
NOTES: 1. CONTROLLING DIMENSION: INCH. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.006 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 4. DIMENSIONS b1 AND b3 DO NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.005 TOTAL IN EXCESS OF THE b1 AND b2 DIMENSIONS AT MAXIMUM MATERIAL CONDITION. 5. CROSSHATCHING REPRESENTS THE EXPOSED AREA OF THE HEAT SLUG. 6. DIMENSION A2 APPLIES WITHIN ZONE J ONLY. DIM A A1 A2 D D1 D2 E E1 E2 F P b1 b2 b3 c1 e aaa bbb INCHES MIN MAX 0.098 0.106 0.038 0.044 0.040 0.042 0.926 0.934 0.810 BSC 0.608 BSC 0.492 0.500 0.246 0.254 0.170 BSC 0.025 BSC 0.126 0.134 0.193 0.199 0.078 0.084 0.088 0.094 0.007 0.011 0.193 BSC 0.004 0.008 MILLIMETERS MIN MAX 2.49 2.69 0.96 1.12 1.02 1.07 23.52 23.72 20.57 BSC 15.44 BSC 12.50 12.70 6.25 6.45 4.32 BSC 0.64 BSC 3.20 3.40 4.90 5.05 1.98 2.13 2.24 2.39 0.178 0.279 4.90 BSC 0.10 0.20
STYLE 1: PIN 1. 2. 3. 4. 5. 6.
SOURCE (COMMON) DRAIN SOURCE (COMMON) SOURCE (COMMON) GATE SOURCE (COMMON)
CASE 1264A-02 ISSUE A TO-272 STRAIGHT LEAD PLASTIC MRF1550FT1
MOTOROLA RF DEVICE DATA
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MRF1550T1 MRF1550FT1 11
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MOTOROLA RF DEVICE DATA
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